Akash Kumar – författare

This book describes a new, coarse-grained reconfigurable architecture (CGRA), called Blocks, and puts it in the context of computer architectures, and in particular of other CGRAs.

This book describes a new, coarse-grained reconfigurable architecture (CGRA), called Blocks, and puts it in the context of computer architectures, and in particular of other CGRAs.

This book presents various novel architectures for FPGA-optimized accurate and approximate operators, their detailed accuracy and performance analysis, various techniques to model the behavior of approximate operators, and thorough application-level analysis to evaluate the impact of approximations on the final output quality and performance metrics. As multiplication is one of the most commonly used and computationally expensive operations in various error-resilient applications such as digital signal and image processing and machine learning algorithms, this book particularly focuses on this operation. The book starts by elaborating on the various sources of error resilience and opportunities available for approximations on various layers of the computation stack. It then provides a detailed description of the state-of-the-art approximate computing-related works and highlights their limitations.

This book presents various novel architectures for FPGA-optimized accurate and approximate operators, their detailed accuracy and performance analysis, various techniques to model the behavior of approximate operators, and thorough application-level analysis to evaluate the impact of approximations on the final output quality and performance metrics. As multiplication is one of the most commonly used and computationally expensive operations in various error-resilient applications such as digital signal and image processing and machine learning algorithms, this book particularly focuses on this operation. The book starts by elaborating on the various sources of error resilience and opportunities available for approximations on various layers of the computation stack. It then provides a detailed description of the state-of-the-art approximate computing-related works and highlights their limitations.

Dieses Buch beschreibt eine neue, grobkörnige rekonfigurierbare Architektur (CGRA), genannt Blocks, und stellt sie in den Kontext von Computerarchitekturen und insbesondere von anderen CGRAs.

This book is a single-source solution for anyone who is interested in exploring emerging reconfigurable nanotechnology at the circuit level. It lays down a solid foundation for circuits based on this technology having considered both manual as well as automated design flows. The authors discuss the entire design flow, consisting of both logic and physical synthesis for reconfigurable nanotechnology-based circuits. The authors describe how transistor reconfigurable properties can be exploited at the logic level to have a more efficient circuit design flow, as compared to conventional design flows suited for CMOS. Further, the book provides insights into hardware security features that can be intrinsically developed  using the runtime reconfigurable features of this nanotechnology.

This book is a single-source solution for anyone who is interested in exploring emerging reconfigurable nanotechnology at the circuit level. It lays down a solid foundation for circuits based on this technology having considered both manual as well as automated design flows. The authors discuss the entire design flow, consisting of both logic and physical synthesis for reconfigurable nanotechnology-based circuits. The authors describe how transistor reconfigurable properties can be exploited at the logic level to have a more efficient circuit design flow, as compared to conventional design flows suited for CMOS. Further, the book provides insights into hardware security features that can be intrinsically developed  using the runtime reconfigurable features of this nanotechnology.

This book addresses the challenges associated with efficient Mixed-Criticality (MC) system design. We focus on application analysis through execution time analysis and task scheduling analysis in order to execute more low-criticality tasks in the system, i.e., improving the Quality-of-Service (QoS), while guaranteeing the correct execution of high-criticality tasks. Further, this book addresses the challenge of enhancing QoS using parallelism in multi-processor hardware platforms.

We focus on application analysis through execution time analysis and task scheduling analysis in order to execute more low-criticality tasks in the system, i.e., improving the Quality-of-Service (QoS), while guaranteeing the correct execution of high-criticality tasks.

This book presents a novel Cross-Layer Approximation and Distribution architecture and methodology that advances the design of high-performance, high-throughput, energy-efficient, and sustainable reconfigurable computing systems. By leveraging the error tolerance inherent in modern AI and signal processing workloads, it enables performance and energy gains across hardware and software layers. The authors introduce innovative approximate multipliers, dividers, and coarse-grained processing elements for FPGA and CGRA platforms, coupled with an error-resiliency analysis and a heuristic-driven optimization framework that dynamically balance performance and accuracy. Extending beyond conventional architectures, the methodology described also integrates novel In-Network Computing (INC) techniques to bring computation closer to data sources within 5G/6G infrastructures. The result is a cohesive, scalable approach that redefines how energy-efficient and adaptive computing can be achieved across the edge-to-cloud continuum.Describes a unified perspective on how approximation techniques can be applied across multiple abstraction levels;Discusses how FPGAs, CGRAs and In-Network Computing can enable scalable, distributed, and low-latency computation;Introduces architectural designs such as approximate multipliers, dividers, and hybrid SIMD/MIMD processing elements.

This book discusses analysis, design and optimization techniques for streaming multiprocessor systems, while satisfying a given area, performance, and energy budget. The authors describe design flows for both application-specific and general purpose streaming systems.  Coverage also includes the use of machine learning for thermal optimization at run-time, when an application is being executed.  The design flow described in this book extends to thermal and energy optimization with multiple applications running sequentially and concurrently.

This book discusses analysis, design and optimization techniques for streaming multiprocessor systems, while satisfying a given area, performance, and energy budget. The design flow described in this book extends to thermal and energy optimization with multiple applications running sequentially and concurrently.

Modern multimedia systems are becoming increasingly multiprocessor and heterogeneous to match the high performance and low power demands placed on them by the large number of applications. The concurrent execution of these applications causes interference and unpredictability in the performance of these systems. In Multimedia Multiprocessor Systems, an analysis mechanism is presented to accurately predict the performance of multiple applications executing concurrently. With high consumer demand the time-to-market has become significantly lower. To cope with the complexity in designing such systems, an automated design-flow is needed that can generate systems from a high-level architectural description such that they are not error-prone and consume less time. Such a design methodology is presented for multiple use-cases -- combinations of active applications. A resource manager is also presented to manage the various resources in the system, and to achieve the goals of performance prediction, admission control and budget enforcement.