Jawar Singh – författare

This book provides a guide to Static Random Access Memory (SRAM) bitcell design and analysis to meet the nano-regime challenges for CMOS devices and emerging devices, such as Tunnel FETs. Since process variability is an ongoing challenge in large memory arrays, this book highlights the most popular SRAM bitcell topologies (benchmark circuits) that mitigate variability, along with exhaustive analysis. Experimental simulation setups are also included, which cover nano-regime challenges such as process variation, leakage and NBTI for SRAM design and analysis. Emphasis is placed throughout the book on the various trade-offs for achieving a best SRAM bitcell design.

The book presents a collection of peer-reviewed articles from the International Conference on Innovations in Cyber Physical Systems (ICICPS 2020). The conference provided opportunities for the presentation of new research results and discussion about them. It was also an opportunity to generation of new ideas in all CPS aspects, including theory, tools, applications, systems, test-beds and field deployments. The range of topics explored is wide, and covers security, control, optimization, machine learning, game theory, mechanism design, mobile and cloud computing, model-based design, verification, data mining/analytics, signal processing, and human-in-the-loop shared or supervisory control. This book will be useful to researchers, students, industrialist, developers, and practitioners alike.