Peter Y.K. Cheung - Böcker

This title explains how to synthesize digital diagnostic sequences for wire interconnects using boundary-scan, and how to assess the quality of those sequences. Its importance has to do with designing complex electronic systems using pre-designed intellectual property (IP) cores, which is becoming increasingly popular. Since tests for pre-designed cores can be supplied with the cores themselves, the only additional tests that need to be developed to test and diagnose the entire system are those for wire interconnects between the cores. Besides the trivial solutions that are often used to solve this problem, there are many more methods that enable significant optimizations of test vector length and/or diagnostic resolution. The book surveys all existing methods of this kind and proposes new ones. In the new approach circuit and interconnect faults are carefully modeled, and graph techniques are applied to solve the problem. The original feature of the new method is the fact that it can be adjusted to provide shorter test sequences and/or greater diagnostic resolution.The effectiveness of existing and proposed methods is then evaluated using real electronic assemblies and published statistical data for an actual manufacturing process from HP.

Synthesis and Optimization of DSP Algorithms describes approaches taken to synthesising structural hardware descriptions of digital circuits from high-level descriptions of Digital Signal Processing (DSP) algorithms. The book contains: A wide body of literature exists covering separately the areas of DSP, hardware design, and design automation. This book brings together the fields, concentrating on those transformations, optimizations, and design techniques that would usually be considered to cross the domain boundaries between "pure DSP" and "pure digital implementation". As such, this book forms a valuable contribution to the existing literature. Synthesis and Optimization of DSP Algorithms is of use both to researchers and students in the field of design automation for DSP systems, and to those wishing to implement state-of-the-art techniques within an Electronic Design Automation framework.

Boundary-Scan Interconnect Diagnosis explains how to synthesize digital diagnostic sequences for wire interconnects using boundary-scan, and how to assess the quality of those sequences. Its importance has to do with designing complex electronic systems using pre-designed intellectual property (IP) cores, which is becoming increasingly popular nowadays. Since tests for pre-designed cores can be supplied with the cores themselves, the only additional tests that need to be developed to test and diagnose the entire system are those for wire interconnects between the cores. Besides the trivial solutions that are often used to solve this problem, there are many more methods that enable significant optimizations of test vector length and/or diagnostic resolution. The book surveys all existing methods of this kind and proposes new ones. In the new approach circuit and interconnect faults are carefully modeled, and graph techniques are applied to solve the problem. The original feature of the new method is the fact that it can be adjusted to provide shorter test sequences and/or greater diagnostic resolution. The effectiveness of existing and proposed methods is then evaluated using real electronic assemblies and published statistical data for an actual manufacturing process from HP.

Synthesis and Optimization of DSP Algorithms describes approaches taken to synthesising structural hardware descriptions of digital circuits from high-level descriptions of Digital Signal Processing (DSP) algorithms. The book contains: -A tutorial on the subjects of digital design and architectural synthesis, intended for DSP engineers, -A tutorial on the subject of DSP, intended for digital designers, -A discussion of techniques for estimating the peak values likely to occur in a DSP system, thus enabling an appropriate signal scaling. Analytic techniques, simulation techniques, and hybrids are discussed. The applicability of different analytic approaches to different types of DSP design is covered, -The development of techniques to optimise the precision requirements of a DSP algorithm, aiming for efficient implementation in a custom parallel processor. The idea is to trade-off numerical accuracy for area or power-consumption advantages. Again, both analytic and simulation techniques for estimating numerical accuracy are described and contrasted. Optimum and heuristic approaches to precision optimisation are discussed, -A discussion of the importance of the scheduling, allocation, and binding problems, and development of techniques to automate these processes with reference to a precision-optimized algorithm, -Future perspectives for synthesis and optimization of DSP algorithms.

This book constitutes the refereed proceedings of the 13th International Conference on Field-Programmable Logic and Applications, FPL 2003, held in Lisbon, Portugal in September 2003.The 90 revised full papers and 56 revised poster papers presented were carefully reviewed and selected from 216 submissions. The papers are organized in topical sections on technologies and trends, communications applications, high level design tools, reconfigurable architecture, cryptographic applications, multi-context FPGAs, low-power issues, run-time reconfiguration, compilation tools, asynchronous techniques, bio-related applications, codesign, reconfigurable fabrics, image processing applications, SAT techniques, application-specific architectures, DSP applications, dynamic reconfiguration, SoC architectures, emulation, cache design, arithmetic, bio-inspired design, SoC design, cellular applications, fault analysis, and network applications.