Rajat Subhra Chakraborty – författare

Artificial Intelligence and Deep Learning for Computer Network: Management and Analysis aims to systematically collect quality research spanning AI, ML, and deep learning (DL) applications to diverse sub-topics of computer networks, communications, and security, under a single cover. It also aspires to provide more insights on the applicability of the theoretical similitudes, otherwise a rarity in many such books.Features:A diverse collection of important and cutting-edge topics covered in a single volumeSeveral chapters on cybersecurity, an extremely active research areaRecent research results from leading researchers and some pointers to future advancements in methodologyDetailed experimental results obtained from standard data setsThis book serves as a valuable reference book for students, researchers, and practitioners who wish to study and get acquainted with the application of cutting-edge AI, ML, and DL techniques to network management and cyber security.

Artificial Intelligence and Deep Learning for Computer Network: Management and Analysis aims to systematically collect quality research spanning AI, ML, and deep learning (DL) applications to diverse sub-topics of computer networks, communications, and security, under a single cover. It also aspires to provide more insights on the applicability of the theoretical similitudes, otherwise a rarity in many such books.Features:A diverse collection of important and cutting-edge topics covered in a single volumeSeveral chapters on cybersecurity, an extremely active research areaRecent research results from leading researchers and some pointers to future advancements in methodologyDetailed experimental results obtained from standard data setsThis book serves as a valuable reference book for students, researchers, and practitioners who wish to study and get acquainted with the application of cutting-edge AI, ML, and DL techniques to network management and cyber security.

Beginning with an introduction to cryptography, Hardware Security: Design, Threats, and Safeguards explains the underlying mathematical principles needed to design complex cryptographic algorithms. It then presents efficient cryptographic algorithm implementation methods, along with state-of-the-art research and strategies for the design of very large scale integrated (VLSI) circuits and symmetric cryptosystems, complete with examples of Advanced Encryption Standard (AES) ciphers, asymmetric ciphers, and elliptic curve cryptography (ECC).Gain a Comprehensive Understanding of Hardware Security—from Fundamentals to Practical ApplicationsSince most implementations of standard cryptographic algorithms leak information that can be exploited by adversaries to gather knowledge about secret encryption keys, Hardware Security: Design, Threats, and Safeguards: Details algorithmic- and circuit-level countermeasures for attacks based on power, timing, fault, cache, and scan chain analysisDescribes hardware intellectual property piracy and protection techniques at different levels of abstraction based on watermarkingDiscusses hardware obfuscation and physically unclonable functions (PUFs), as well as Trojan modeling, taxonomy, detection, and preventionDesign for Security and Meet Real-Time RequirementsIf you consider security as critical a metric for integrated circuits (ICs) as power, area, and performance, you’ll embrace the design-for-security methodology of Hardware Security: Design, Threats, and Safeguards.

This book covers various aspects of security, privacy and reliability in Internet of Things (IoT) and Cyber-Physical System design, analysis and testing. In particular, various established theories and practices both from academia and industry are presented and suitably organized targeting students, engineers and researchers. Fifteen leading academicians and practitioners wrote this book, pointing to the open problems and biggest challenges on which research in the near future will be focused.

Digital Watermarking is the art and science of embedding information in existing digital content for Digital Rights Management (DRM) and authentication.

This book constitutes the refereed proceedings of the 4th International Conference on Security, Privacy, and Applied Cryptography Engineering held in Pune, India, in October 2014. The 19 papers presented together with two invited papers were carefully reviewed and selected from 66 submissions. The papers are organized in topical sections on cryptographic building blocks; mini tutorial; attacks and countermeasures; tools and methods; and secure systems and applications.

This book constitutes the refereed proceedings of the 5thInternational Conference on Security, Privacy, and Applied CryptographyEngineering, SPACE 2015, held in Jaipur, India, in October 2015. The 17 full papers presented in this volume werecarefully reviewed and selected from 57 submissions.

This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary “User Constraints File”. The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students and professionals engaged in the domain of FPGA circuit optimization and implementation.

This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs).

This book discusses blind investigation and recovery of digital evidence left behind on digital devices, primarily for the purpose of tracing cybercrime sources and criminals. It presents an overview of the challenges of digital image forensics, with a specific focus on two of the most common forensic problems. The first part of the book addresses image source investigation, which involves mapping an image back to its camera source to facilitate investigating and tracing the source of a crime. The second part of the book focuses on image-forgery detection, primarily focusing on “copy-move forgery” in digital images, and presenting effective solutions to copy-move forgery detection with an emphasis on additional related challenges such as blur-invariance, similar genuine object identification, etc. The book concludes with future research directions, including counter forensics. With the necessary mathematical information in every chapter, the book serves as a useful reference resource for researchers and professionals alike. In addition, it can also be used as a supplementary text for upper-undergraduate and graduate-level courses on “Digital Image Processing”, “Information Security”, “Machine Learning”, “Computer Vision” and “Multimedia Security and Forensics”.

The book discusses a broad overview of traditional machine learning methods and state-of-the-art deep learning practices for hardware security applications, in particular the techniques of launching potent "modeling attacks" on Physically Unclonable Function (PUF) circuits, which are promising hardware security primitives.