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Robert L. Maziasz – författare

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3 produkter

  1. Robert L. Maziasz, John P. Hayes - Layout Minimization of CMOS Cells, Inbunden. Tillgänglighet: Lägg i varukorg

    Layout Minimization of CMOS Cells

    Av Robert L. Maziasz, John P. Hayes

    Inbunden, 1991

    1095 kr

    Lägg i varukorg

    The layout of an integrated circuit (lC) is the process of assigning geometric shape, size and position to the components (transistors and connections) used in its fabrication. Since the number of components in modem ICs is enormous, computer­ aided-design (CAD) programs are required to automate …

  2. Robert L. Maziasz, John P. Hayes - Layout Minimization of CMOS Cells, Häftad. Tillgänglighet: Lägg i varukorg

    Layout Minimization of CMOS Cells

    Av Robert L. Maziasz, John P. Hayes

    Häftad, 2012

    1098 kr

    Lägg i varukorg

    The layout of an integrated circuit (lC) is the process of assigning geometric shape, size and position to the components (transistors and connections) used in its fabrication. Since the number of components in modem ICs is enormous, computer­ aided-design (CAD) programs are required to automate …

  3. John P. Hayes, Robert L. Maziasz - Layout Minimization of CMOS Cells, E-bok. Tillgänglighet: Lägg i varukorg

    Layout Minimization of CMOS Cells

    Av John P. Hayes, Robert L. Maziasz

    E-bok, 2012

    1459 kr

    Lägg i varukorg

    The layout of an integrated circuit (lC) is the process of assigning geometric shape, size and position to the components (transistors and connections) used in its fabrication. Since the number of components in modem ICs is enormous, computer­ aided-design (CAD) programs are required to automate …