Anantha P. Chandrakasan – författare

Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumption, and in many scaled technologies leakage contributes 30-50% of the overall power consumption under nominal operating conditions. Leakage is important in a variety of different contexts. For example, in desktop applications, active leakage power (i.e., leakage power when the processor is computing) is becoming significant compared to switching power. In battery operated systems, standby leakage (i.e., leakage when the processor clock is turned off) dominates as energy is drawn over long idle periods. Increased transistor leakages not only impact the overall power consumed by a CMOS system, but also reduce the margins available for design due to the strong relationship between process variation and leakage power. It is essential for circuit and system designers to understand the components of leakage, sensitivity of leakage to different design parameters, and leakage mitigation techniques in nanometer technologies. This book provides an in-depth treatment of these issues for researchers and product designers.

Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumption, and in many scaled technologies leakage contributes 30-50% of the overall power consumption under nominal operating conditions. Leakage is important in a variety of different contexts. For example, in desktop applications, active leakage power (i.e., leakage power when the processor is computing) is becoming significant compared to switching power. In battery operated systems, standby leakage (i.e., leakage when the processor clock is turned off) dominates as energy is drawn over long idle periods. Increased transistor leakages not only impact the overall power consumed by a CMOS system, but also reduce the margins available for design due to the strong relationship between process variation and leakage power. It is essential for circuit and system designers to understand the components of leakage, sensitivity of leakage to different design parameters, and leakage mitigation techniques in nanometer technologies. This book provides an in-depth treatment of these issues for researchers and product designers.

Although energy dissipation has improved with each new technology node, because SoCs are integrating tens of million devices on-chip, the energy ex­ pended per operation has become a critical consideration in digital and ana­ log integrated circuits. The focus of this book is sub-threshold circuit design, which involves scaling voltages below the device thresholds. In this region, the energy per operation cair be reduced by an order of magnitude compared to conventional operation but at the cost of circuit performance. In many emerging applications such as self-powered RFID, wireless sensors networks, and portable devices (PDAs, medical monitoring, etc. ), the overall battery life­ time is the primary design metric. Sub-threshold design can also be applied to burst mode applications (e. g. , a cell-phone processor) where the process spends a significant amount of time in the standby mode. The supply voltage can be reduced to the deep sub-threshold region, dramatically saving power in logic and memory. Extremely low-power design was first explored in the 1970s for the design of applications such as wristwatch and calculator circuits. Dr. Eric Vittoz pioneered the design and modeling of weak-inversion circuits. In this book, Eric provides his perspective on the evolution of sub-threshold circuit design. Dr. Eric Vittoz and Dr. Christian Enz introduce key models necessary for the design and optimization of weak inversion circuits. Design using weak inversion has been widely adopted in analog circuits, and Eric introduces the key design considerations.

Although energy dissipation has improved with each new technology node, because SoCs are integrating tens of million devices on-chip, the energy ex­ pended per operation has become a critical consideration in digital and ana­ log integrated circuits. The focus of this book is sub-threshold circuit design, which involves scaling voltages below the device thresholds. In this region, the energy per operation cair be reduced by an order of magnitude compared to conventional operation but at the cost of circuit performance. In many emerging applications such as self-powered RFID, wireless sensors networks, and portable devices (PDAs, medical monitoring, etc. ), the overall battery life­ time is the primary design metric. Sub-threshold design can also be applied to burst mode applications (e. g. , a cell-phone processor) where the process spends a significant amount of time in the standby mode. The supply voltage can be reduced to the deep sub-threshold region, dramatically saving power in logic and memory. Extremely low-power design was first explored in the 1970s for the design of applications such as wristwatch and calculator circuits. Dr. Eric Vittoz pioneered the design and modeling of weak-inversion circuits. In this book, Eric provides his perspective on the evolution of sub-threshold circuit design. Dr. Eric Vittoz and Dr. Christian Enz introduce key models necessary for the design and optimization of weak inversion circuits. Design using weak inversion has been widely adopted in analog circuits, and Eric introduces the key design considerations.

Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems. Strict limitations on power dissipation must be met by the designer while still meeting ever higher computational requirements. A comprehensive approach is thus required at all levels of system design, ranging from algorithms and architectures to the logic styles and the underlying technology. Potentially one of the most important techniques involves combining architecture optimization with voltage scaling, allowing a trade-off between silicon area and low-power operation. Architectural optimization enables supply voltages of the order of 1 V using standard CMOS technology. Several techniques can also be used to minimize the switched capacitance, including representation, optimizing signal correlations, minimizing spurious transitions, optimizing sequencing of operations, activity-driven power down, etc. The high- efficiency of DC-DC converter circuitry required for efficient, low-voltage and low-current level operation is described by Stratakos, Sullivan and Sanders. The application of various low-power techniques to a chip set for multimedia applications shows that orders-of-magnitude reduction in power consumption is possible. The book also features an analysis by Professor Meindl of the fundamental limits of power consumption achievable at all levels of the design hierarchy. Svensson, of ISI, describes emerging adiabatic switching techniques that can break the CV2f barrier and reduce the energy per computation at a fixed voltage. Srivastava, of AT&T, presents the application of aggressive shut-down techniques to microprocessor applications.

Research since the mid-1980s has brought about the development of high-performance systems such as powerful workstations, sophisticated computer graphics, and multimedia systems such as real-time video and speech recognition. A significant change in the attitude of users is the desire to have access to this computation at any location without the need to be connected to the wired power source. This has resulted in the growth of research and development in the area of wireless computing since the early-1990s. This text deals with several key technologies required for wireless computing. The topics covered include reliable wireless protocols, portable terminal design considerations, video coding, RF circuit design issues and tools, display technology, energy-efficient applications, specific and programmable design techniques, energy efficiency metrics, low-voltage process technology and circuit design considerations, and CAD tools for low-power design at the behavior, logic and physical design level. The book is an edited volume of original research comprising invited contributions by leading researchers.This research work has also been published as a special issue of the "Journal of VLSI Signal Processing Systems" (Volume 13, Numbers 2 & 3).

Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumption, and in many scaled technologies leakage contributes 30-50% of the overall power consumption under nominal operating conditions. Leakage is important in a variety of different contexts. For example, in desktop applications, active leakage power (i.e., leakage power when the processor is computing) is becoming significant compared to switching power. In battery operated systems, standby leakage (i.e., leakage when the processor clock is turned off) dominates as energy is drawn over long idle periods. Increased transistor leakages not only impact the overall power consumed by a CMOS system, but also reduce the margins available for design due to the strong relationship between process variation and leakage power. It is essential for circuit and system designers to understand the components of leakage, sensitivity of leakage to different design parameters, and leakage mitigation techniques in nanometer technologies. This book provides an in-depth treatment of these issues for researchers and product designers.

Although energy dissipation has improved with each new technology node, because SoCs are integrating tens of million devices on-chip, the energy ex­ pended per operation has become a critical consideration in digital and ana­ log integrated circuits. The focus of this book is sub-threshold circuit design, which involves scaling voltages below the device thresholds. In this region, the energy per operation cair be reduced by an order of magnitude compared to conventional operation but at the cost of circuit performance. In many emerging applications such as self-powered RFID, wireless sensors networks, and portable devices (PDAs, medical monitoring, etc. ), the overall battery life­ time is the primary design metric. Sub-threshold design can also be applied to burst mode applications (e. g. , a cell-phone processor) where the process spends a significant amount of time in the standby mode. The supply voltage can be reduced to the deep sub-threshold region, dramatically saving power in logic and memory. Extremely low-power design was first explored in the 1970s for the design of applications such as wristwatch and calculator circuits. Dr. Eric Vittoz pioneered the design and modeling of weak-inversion circuits. In this book, Eric provides his perspective on the evolution of sub-threshold circuit design. Dr. Eric Vittoz and Dr. Christian Enz introduce key models necessary for the design and optimization of weak inversion circuits. Design using weak inversion has been widely adopted in analog circuits, and Eric introduces the key design considerations.

Research over the last decade has brought about the development of high-performance systems such as powerful workstations, sophisticated computer graphics, and multimedia systems such as real-time video and speech recognition. A significant change in the attitude of users is the desire to have access to this computation at any location without the need to be connected to the wired power source. This has resulted in the explosive growth of research and development in the area of wireless computing over the last five years. Technologies for Wireless Computing deals with several key technologies required for wireless computing. The topics covered include reliable wireless protocols, portable terminal design considerations, video coding, RF circuit design issues and tools, display technology, energy-efficient applications, specific and programmable design techniques, energy efficiency metrics, low-voltage process technology and circuit design considerations, and CAD tools for low-power design at the behavior, logic and physical design level. Technologies for Wireless Computing is an edited volume of original research comprising invited contributions by leading researchers. This research work has also been published as a special issue of the Journal of VLSI Signal Processing Systems (Volume 13, Numbers 2 & 3).

Research over the last decade has brought about the development of high-performance systems such as powerful workstations, sophisticated computer graphics, and multimedia systems such as real-time video and speech recognition. A significant change in the attitude of users is the desire to have access to this computation at any location without the need to be connected to the wired power source. This has resulted in the explosive growth of research and development in the area of wireless computing over the last five years. Technologies for Wireless Computing deals with several key technologies required for wireless computing. The topics covered include reliable wireless protocols, portable terminal design considerations, video coding, RF circuit design issues and tools, display technology, energy-efficient applications, specific and programmable design techniques, energy efficiency metrics, low-voltage process technology and circuit design considerations, and CAD tools for low-power design at the behavior, logic and physical design level. Technologies for Wireless Computing is an edited volume of original research comprising invited contributions by leading researchers. This research work has also been published as a special issue of the Journal of VLSI Signal Processing Systems (Volume 13, Numbers 2 & 3).

Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems. Strict limitations on power dissipation must be met by the designer while still meeting ever higher computational requirements. A comprehensive approach is thus required at all levels of system design, ranging from algorithms and architectures to the logic styles and the underlying technology. Potentially one of the most important techniques involves combining architecture optimization with voltage scaling, allowing a trade-off between silicon area and low-power operation. Architectural optimization enables supply voltages of the order of 1 V using standard CMOS technology. Several techniques can also be used to minimize the switched capacitance, including representation, optimizing signal correlations, minimizing spurious transitions, optimizing sequencing of operations, activity-driven power down, etc. The high- efficiency of DC-DC converter circuitry required for efficient, low-voltage and low-current level operation is described by Stratakos, Sullivan and Sanders. The application of various low-power techniques to a chip set for multimedia applications shows that orders-of-magnitude reduction in power consumption is possible. The book also features an analysis by Professor Meindl of the fundamental limits of power consumption achievable at all levels of the design hierarchy. Svensson, of ISI, describes emerging adiabatic switching techniques that can break the CV2f barrier and reduce the energy per computation at a fixed voltage. Srivastava, of AT&T, presents the application of aggressive shut-down techniques to microprocessor applications.

Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems. Strict limitations on power dissipation must be met by the designer while still meeting ever higher computational requirements. A comprehensive approach is thus required at all levels of system design, ranging from algorithms and architectures to the logic styles and the underlying technology. Potentially one of the most important techniques involves combining architecture optimization with voltage scaling, allowing a trade-off between silicon area and low-power operation. Architectural optimization enables supply voltages of the order of 1 V using standard CMOS technology. Several techniques can also be used to minimize the switched capacitance, including representation, optimizing signal correlations, minimizing spurious transitions, optimizing sequencing of operations, activity-driven power down, etc. The high- efficiency of DC-DC converter circuitry required for efficient, low-voltage and low-current level operation is described by Stratakos, Sullivan and Sanders. The application of various low-power techniques to a chip set for multimedia applications shows that orders-of-magnitude reduction in power consumption is possible. The book also features an analysis by Professor Meindl of the fundamental limits of power consumption achievable at all levels of the design hierarchy. Svensson, of ISI, describes emerging adiabatic switching techniques that can break the CV2f barrier and reduce the energy per computation at a fixed voltage. Srivastava, of AT&T, presents the application of aggressive shut-down techniques to microprocessor applications.

This book explores the design of ultra-low-power radio-frequency integrated circuits (RFICs), with communication distances ranging from a few centimeters to a few meters. The authors describe leading-edge techniques to achieve ultra-low-power communication over short-range links. Many different applications are covered, ranging from body-area networks to transcutaneous implant communications and smart-appliance sensor networks. Various design techniques are explained to facilitate each of these applications.

This book explores the design of ultra-low-power radio-frequency integrated circuits (RFICs), with communication distances ranging from a few centimeters to a few meters. The authors describe leading-edge techniques to achieve ultra-low-power communication over short-range links. Many different applications are covered, ranging from body-area networks to transcutaneous implant communications and smart-appliance sensor networks. Various design techniques are explained to facilitate each of these applications.