Georges Gielen – författare

Modern System-on-Chip designs are increasingly mixed-signal designs that require efficient systematic design methodologies and supporting computer-aided design (CAD) tools to manage the design complexity in the available design time, that is ever decreasing due to tightening time-to-market constraints. The purpose of Low-Power Design Techniques and CAD Tools for Analog and RF Integrated Circuits is to provide an overview of very recent research results that have been achieved as part of the Low-Power Initiative of the European Union, in the field of analog, RF and mixed-signal design methodologies and CAD tools. It is a representative sampling of the current state of the art in this area, with special focus on low-power design methodologies and tools for analog and RF circuits and architectures. Concrete designs, mainly for telecommunication applications, such as low-noise amplifiers, oscillators, filters, but also complete transceiver front-ends, are discussed and analyzed in a methodological way, and their modeling and simulation, both at the circuit level and at the architectural level, are treated. In this way, the eleven contributions of this book combine in a unique way designs with methodologies and CAD that will be interesting to designers and CAD developers, both in industry and academia.

This book is the first in a series of three dedicated to advanced topics in Mixed-Signal IC design methodologies. It is one of the results achieved by the Mixed-Signal Design Cluster, an initiative launched in 1998 as part of the TARDIS project, funded by the European Commission within the ESPRIT-IV Framework. This initiative aims to promote the development of new design and test methodologies for Mixed-Signal ICs, and to accelerate their adoption by industrial users. As Microelectronics evolves, Mixed-Signal techniques are gaining a significant importance due to the wide spread of applications where an analog front-end is needed to drive a complex digital-processing subsystem. In this sense, Analog and Mixed-Signal circuits are recognized as a bottleneck for the market acceptance of Systems-On-Chip, because of the inherent difficulties involved in the design and test of these circuits. Specially, problems arising from the use of a common substrate for analog and digital components are a main limiting factor. The Mixed-Signal Cluster has been formed by a group of 11 Research and Development projects, plus a specific action to promote the dissemination of design methodologies, techniques, and supporting tools developed within the Cluster projects. The whole action, ending in July 2002, has been assigned an overall budget of more than 8 million EURO.

Modern System-on-Chip designs are increasingly mixed-signal designs that require efficient systematic design methodologies and supporting computer-aided design (CAD) tools to manage the design complexity in the available design time, that is ever decreasing due to tightening time-to-market constraints. The purpose of Low-Power Design Techniques and CAD Tools for Analog and RF Integrated Circuits is to provide an overview of very recent research results that have been achieved as part of the Low-Power Initiative of the European Union, in the field of analog, RF and mixed-signal design methodologies and CAD tools. It is a representative sampling of the current state of the art in this area, with special focus on low-power design methodologies and tools for analog and RF circuits and architectures. Concrete designs, mainly for telecommunication applications, such as low-noise amplifiers, oscillators, filters, but also complete transceiver front-ends, are discussed and analyzed in a methodological way, and their modeling and simulation, both at the circuit level and at the architectural level, are treated. In this way, the eleven contributions of this book combine in a unique way designs with methodologies and CAD that will be interesting to designers and CAD developers, both in industry and academia.

In the first part the AMGIE analog synthesis system is described. AMGIE is the first analog synthesis system that automates the full design process from specifications down to verified layout. It is targeted to the design of moderate-complexity circuits. It relies on design and circuit knowledge stored in the tool's libraries and can be used by both novice and experienced analog designers as well as system-level designers. The inner workings are explained in detail, with (practical) examples to demonstrate how the implemented algorithms and techniques work. Experimental results obtained with the AMGIE system are reported, including actual fabricated and measured circuits. The second approach, i.e. the systematic design of high-performance analog circuits, is discussed in the second part of the book. This approach is supported by tools to boost the productivity of the designer. An example of such a tool is Mondriaan, that is targeted towards the automatic layout generation of highly regular analog blocks. The proposed systematic design methodology is then applied to the design of high-accuracy current-steering digital to analog converters (DACs). The full design path is discussed in detail. Both complementary approaches increase analog design productivity. Design times of the different design experiments undertaken are reported throughout the book to demonstrate this.

Analog integrated circuits are very important as interfaces between the digital parts of integrated electronic systems and the outside world. A large portion of the effort involved in designing these circuits is spent in the layout phase. Whereas the physical design of digital circuits is automated to a large extent, the layout of analog circuits is still a manual, time-consuming and error-prone task. This is mainly due to the continuous nature of analog signals, which causes analog circuit performance to be very sensitive to layout parasitics. The parasitic elements associated with interconnect wires cause loading and coupling effects that degrade the frequency behaviour and the noise performance of analog circuits. Device mismatch and thermal effects put a fundamental limit on the achievable accuracy of circuits. For successful automation of analog layout, advanced place and route tools that can handle these critical parasitics are required. In the past, automatic analog layout tools tried to optimize the layout without quantifying the performance degradation introduced by layout parasitics. Therefore, it was not guaranteed that the resulting layout met the specifications and one or more layout iterations could be needed. In Analog Layout Generation for Performance and Manufacturability, the authors propose a performance driven layout strategy to overcome this problem. In this methodology, the layout tools are driven by performance constraints, such that the final layout, with parasitic effects, still satisfies the specifications of the circuit. The performance degradation associated with an intermediate layout solution is evaluated at runtime using predetermined sensitivities. In contrast with other performance driven layout methodologies, the tools proposed in this book operate directly on the performance constraints, without an intermediate parasitic constraint generation step. This approach makes a completeand sensible trade-off between the different layout alternatives possible at runtime and therefore eliminates the possible feedback route between constraint derivation, placement and layout extraction. Besides its influence on the performance, layout also has a profound impact on the yield and testability of an analog circuit. In Analog Layout Generation for Performance and Manufacturability, the authors outline a new criterion to quantify the detectability of a fault and combine this with a yield model to evaluate the testability of an integrated circuit layout. They then integrate this technique with their performance driven routing algorithm to produce layouts that have optimal manufacturability while still meeting their performance specifications. Analog Layout Generation for Performance and Manufacturability will be of interest to analog engineers, researchers and students.

It is a great honor to provide a few words of introduction for Dr. Georges Gielen's and Prof. Willy Sansen's book "Symbolic analysis for automated design of analog integrated circuits". The symbolic analysis method presented in this book represents a significant step forward in the area of analog circuit design. As demonstrated in this book, symbolic analysis opens up new possibilities for the development of computer-aided design (CAD) tools that can analyze an analog circuit topology and automatically size the components for a given set of specifications. Symbolic analysis even has the potential to improve the training of young analog circuit designers and to guide more experienced designers through second-order phenomena such as distortion. This book can also serve as an excellent reference for researchers in the analog circuit design area and creators of CAD tools, as it provides a comprehensive overview and comparison of various approaches for analog circuit design automation and an extensive bibliography. The world is essentially analog in nature, hence most electronic systems involve both analog and digital circuitry. As the number of transistors that can be integrated on a single integrated circuit (IC) substrate steadily increases over time, an ever increasing number of systems will be implemented with one, or a few, very complex ICs because of their lower production costs.

This book brings together important contributions and state-of-the-art research results in the rapidly advancing area of symbolic analysis of analog circuits. It is also of interest to those working in analog CAD. The book is an excellent reference, providing insights into some of the most important issues in the symbolic analysis of analog circuits.

nalog circuits are fascinating artifacts. They manipulate signals whose informa- Ationcontentisrichcomparedtodigitalsignalsthatcarryminimalamountofinf- mation;theyaredelicateinthatanyperturbationduetoparasiticelements,todelays,to interactionswithotherelementsandwiththeenvironmentmaycauseasigni?cantloss ofinformation. Thedif?cultyindealingwiththeseartifactsistoprotectthemfromall possibleattacks, evenminorones, fromthephysicalworld. Theironyisthattheyare oftenusedtofunnelinformationfromandtothephysicalworldtoandfromtheabstr- tionofthedigitalworldandforthisfunction, theyareirreplaceable. Nowonderthen that analog designers form a club of extraordinary gentlemen where art (or magic?) ratherthanscienceisthesharedtrade. Theyaredif?culttotrainsinceexperienceand intuitionarethetraitsthat characterize them. Andthey have dif?cultiesinexplaining what is the process they use to reach satisfactory results. Tools used for design (s- ulation) are mainly replacing the test benches of an experimental lab.However, the growing complexity of the integrated systems being designed today together with the increasing fragility of analog components brought about by shrinking geometries and reducedpowerconsumptionisposingseverechallengestotraditionalanalogdesigners to produce satisfactory results in a short time. At the same time, the need for expe- enced analog designers has increased constantly since almost all designs, because of integration,docontainanalogcomponents. Thissituationhascreatedastronginterest in developing design methodologies and supporting tools that are based on rigorous, mathematically literate, approaches. Doing so will make it possible to leverage the expertiseofseasonedanalogdesignersandtotrainnewgenerationsfasterandbetter. Inthepast, severalattemptshavebeenmadeinacademia andindustrytocreatethese methodologies and to extend the set of tools available. They have had questionable acceptance in the analog design community. However, recently, a ?urry of start-ups andincreasedinvestmentbyEDAcompaniesinnoveltoolssignalasigni?cantchange inmarketattentiontotheanalogdomain. Ipersonallybelievethattosubstantially- prove quality and design time, tools are simply insuf?cient.A design methodology based on a hierarchy of abstraction layers, successive re?nement between two ad- cent layers, and extensive veri?cation at every layer is necessary. To do so, we need to build theories and models that have strong mathematical foundations. The analog design technology community is as strong as it has ever been.

As the miniaturization of semiconductor technology continues, electronic s- tems on chips o?er a more extensive and more complex functionality with better performance, higher frequencies and less power consumption. Whereas digital designers can take full advantage of the availability of design auto- tiontoolstobuildhugesystems,thelackofsupportbycomputerprogramsfor di?erent abstraction levels makes analog design a time-consuming handcraft which limits the possibilities to implement large systems. Various approaches for?ndingoptimalvaluesfortheparametersofanalogcells,likeopamps,have been investigated since the mid-1980s, and they have made their entrance in commercial applications. However, a larger impact on the performance is - pected if tools are developed which operate on a higher abstraction level and consider multiple architectural choices to realize a particular functionality. In this book, the opportunities, conditions, problems, solutions and systematic methodologies for this new generation of analog CAD tools are examined. Theoutlineofthisbookisasfollows. Inthe?rstpart,thecharacteristicsof the analog design process are systematically analyzed and several approaches for automated analog synthesis are summarized. Comparison of their prop- ties with the requirements for high-level synthesis of analog and mixed-signal systems results in a new design paradigm: the high-level design ?ow based on generic behavior. This design approach involves a modeling strategy using generic behavioral models and a synthesis strategy leading to the exploration of a heterogeneous design space containing di?erent architectures. The modeling strategy is further elaborated in Part II.

As the miniaturization of semiconductor technology continues, electronic s- tems on chips o?er a more extensive and more complex functionality with better performance, higher frequencies and less power consumption. Whereas digital designers can take full advantage of the availability of design auto- tiontoolstobuildhugesystems,thelackofsupportbycomputerprogramsfor di?erent abstraction levels makes analog design a time-consuming handcraft which limits the possibilities to implement large systems. Various approaches for?ndingoptimalvaluesfortheparametersofanalogcells,likeopamps,have been investigated since the mid-1980s, and they have made their entrance in commercial applications. However, a larger impact on the performance is - pected if tools are developed which operate on a higher abstraction level and consider multiple architectural choices to realize a particular functionality. In this book, the opportunities, conditions, problems, solutions and systematic methodologies for this new generation of analog CAD tools are examined. Theoutlineofthisbookisasfollows. Inthe?rstpart,thecharacteristicsof the analog design process are systematically analyzed and several approaches for automated analog synthesis are summarized. Comparison of their prop- ties with the requirements for high-level synthesis of analog and mixed-signal systems results in a new design paradigm: the high-level design ?ow based on generic behavior. This design approach involves a modeling strategy using generic behavioral models and a synthesis strategy leading to the exploration of a heterogeneous design space containing di?erent architectures. The modeling strategy is further elaborated in Part II.

This book is the first in a series of three dedicated to advanced topics in Mixed-Signal IC design methodologies. It is one of the results achieved by the Mixed-Signal Design Cluster, an initiative launched in 1998 as part of the TARDIS project, funded by the European Commission within the ESPRIT-IV Framework. This initiative aims to promote the development of new design and test methodologies for Mixed-Signal ICs, and to accelerate their adoption by industrial users. As Microelectronics evolves, Mixed-Signal techniques are gaining a significant importance due to the wide spread of applications where an analog front-end is needed to drive a complex digital-processing subsystem. In this sense, Analog and Mixed-Signal circuits are recognized as a bottleneck for the market acceptance of Systems-On-Chip, because of the inherent difficulties involved in the design and test of these circuits. Specially, problems arising from the use of a common substrate for analog and digital components are a main limiting factor. The Mixed-Signal Cluster has been formed by a group of 11 Research and Development projects, plus a specific action to promote the dissemination of design methodologies, techniques, and supporting tools developed within the Cluster projects. The whole action, ending in July 2002, has been assigned an overall budget of more than 8 million EURO.

Systematic Design of Analog IP Blocks introduces a design methodology that can help to bridge the productivity gap. Two different types of designs, depending on the design challenge, have been identified: commodity IP and star IP. Each category requires a different approach to boost design productivity. Commodity IP blocks are well suited to be automated in an analog synthesis environment and provided as soft IP. The design knowledge is usually common knowledge, and reuse is high accounting for the setup time needed for the analog library. Star IP still changes as technology evolves and the design cost can only be reduced by following a systematic design approach supported by point tools to relieve the designer from error-prone, repetitive tasks, allowing him/her to focus on new ideas to push the limits of the design. To validate the presented methodologies, three different industrial-strength applications have been selected and designed accordingly.

Analog integrated circuits are very important as interfaces between the digital parts of integrated electronic systems and the outside world. A large portion of the effort involved in designing these circuits is spent in the layout phase. Whereas the physical design of digital circuits is automated to a large extent, the layout of analog circuits is still a manual, time-consuming and error-prone task. This is mainly due to the continuous nature of analog signals, which causes analog circuit performance to be very sensitive to layout parasitics. The parasitic elements associated with interconnect wires cause loading and coupling effects that degrade the frequency behaviour and the noise performance of analog circuits. Device mismatch and thermal effects put a fundamental limit on the achievable accuracy of circuits. For successful automation of analog layout, advanced place and route tools that can handle these critical parasitics are required. In the past, automatic analog layout tools tried to optimize the layout without quantifying the performance degradation introduced by layout parasitics. Therefore, it was not guaranteed that the resulting layout met the specifications and one or more layout iterations could be needed. In Analog Layout Generation for Performance and Manufacturability, the authors propose a performance driven layout strategy to overcome this problem. In this methodology, the layout tools are driven by performance constraints, such that the final layout, with parasitic effects, still satisfies the specifications of the circuit. The performance degradation associated with an intermediate layout solution is evaluated at runtime using predetermined sensitivities. In contrast with other performance driven layout methodologies, the tools proposed in this book operate directly on the performance constraints, without an intermediate parasitic constraint generation step. This approach makes a completeand sensible trade-off between the different layout alternatives possible at runtime and therefore eliminates the possible feedback route between constraint derivation, placement and layout extraction. Besides its influence on the performance, layout also has a profound impact on the yield and testability of an analog circuit. In Analog Layout Generation for Performance and Manufacturability, the authors outline a new criterion to quantify the detectability of a fault and combine this with a yield model to evaluate the testability of an integrated circuit layout. They then integrate this technique with their performance driven routing algorithm to produce layouts that have optimal manufacturability while still meeting their performance specifications. Analog Layout Generation for Performance and Manufacturability will be of interest to analog engineers, researchers and students.

nalog circuits are fascinating artifacts. They manipulate signals whose informa- Ationcontentisrichcomparedtodigitalsignalsthatcarryminimalamountofinf- mation;theyaredelicateinthatanyperturbationduetoparasiticelements,todelays,to interactionswithotherelementsandwiththeenvironmentmaycauseasigni?cantloss ofinformation. Thedif?cultyindealingwiththeseartifactsistoprotectthemfromall possibleattacks, evenminorones, fromthephysicalworld. Theironyisthattheyare oftenusedtofunnelinformationfromandtothephysicalworldtoandfromtheabstr- tionofthedigitalworldandforthisfunction, theyareirreplaceable. Nowonderthen that analog designers form a club of extraordinary gentlemen where art (or magic?) ratherthanscienceisthesharedtrade. Theyaredif?culttotrainsinceexperienceand intuitionarethetraitsthat characterize them. Andthey have dif?cultiesinexplaining what is the process they use to reach satisfactory results. Tools used for design (s- ulation) are mainly replacing the test benches of an experimental lab.However, the growing complexity of the integrated systems being designed today together with the increasing fragility of analog components brought about by shrinking geometries and reducedpowerconsumptionisposingseverechallengestotraditionalanalogdesigners to produce satisfactory results in a short time. At the same time, the need for expe- enced analog designers has increased constantly since almost all designs, because of integration,docontainanalogcomponents. Thissituationhascreatedastronginterest in developing design methodologies and supporting tools that are based on rigorous, mathematically literate, approaches. Doing so will make it possible to leverage the expertiseofseasonedanalogdesignersandtotrainnewgenerationsfasterandbetter. Inthepast, severalattemptshavebeenmadeinacademia andindustrytocreatethese methodologies and to extend the set of tools available. They have had questionable acceptance in the analog design community. However, recently, a ?urry of start-ups andincreasedinvestmentbyEDAcompaniesinnoveltoolssignalasigni?cantchange inmarketattentiontotheanalogdomain. Ipersonallybelievethattosubstantially- prove quality and design time, tools are simply insuf?cient.A design methodology based on a hierarchy of abstraction layers, successive re?nement between two ad- cent layers, and extensive veri?cation at every layer is necessary. To do so, we need to build theories and models that have strong mathematical foundations. The analog design technology community is as strong as it has ever been.

This book is the first in a series of three dedicated to advanced topics in Mixed-Signal IC design methodologies. It is one of the results achieved by the Mixed-Signal Design Cluster, an initiative launched in 1998 as part of the TARDIS project, funded by the European Commission within the ESPRIT-IV Framework. This initiative aims to promote the development of new design and test methodologies for Mixed-Signal ICs, and to accelerate their adoption by industrial users. As Microelectronics evolves, Mixed-Signal techniques are gaining a significant importance due to the wide spread of applications where an analog front-end is needed to drive a complex digital-processing subsystem. In this sense, Analog and Mixed-Signal circuits are recognized as a bottleneck for the market acceptance of Systems-On-Chip, because of the inherent difficulties involved in the design and test of these circuits. Specially, problems arising from the use of a common substrate for analog and digital components are a main limiting factor. The Mixed-Signal Cluster has been formed by a group of 11 Research and Development projects, plus a specific action to promote the dissemination of design methodologies, techniques, and supporting tools developed within the Cluster projects. The whole action, ending in July 2002, has been assigned an overall budget of more than 8 million EURO.

Systematic Design of Analog IP Blocks introduces a design methodology that can help to bridge the productivity gap. Two different types of designs, depending on the design challenge, have been identified: commodity IP and star IP. Each category requires a different approach to boost design productivity. Commodity IP blocks are well suited to be automated in an analog synthesis environment and provided as soft IP. The design knowledge is usually common knowledge, and reuse is high accounting for the setup time needed for the analog library. Star IP still changes as technology evolves and the design cost can only be reduced by following a systematic design approach supported by point tools to relieve the designer from error-prone, repetitive tasks, allowing him/her to focus on new ideas to push the limits of the design. To validate the presented methodologies, three different industrial-strength applications have been selected and designed accordingly.

This book brings together important contributions and state-of-the-art research results in the rapidly advancing area of symbolic analysis of analog circuits. It is also of interest to those working in analog CAD. The book is an excellent reference, providing insights into some of the most important issues in the symbolic analysis of analog circuits.

It is a great honor to provide a few words of introduction for Dr. Georges Gielen's and Prof. Willy Sansen's book "Symbolic analysis for automated design of analog integrated circuits". The symbolic analysis method presented in this book represents a significant step forward in the area of analog circuit design. As demonstrated in this book, symbolic analysis opens up new possibilities for the development of computer-aided design (CAD) tools that can analyze an analog circuit topology and automatically size the components for a given set of specifications. Symbolic analysis even has the potential to improve the training of young analog circuit designers and to guide more experienced designers through second-order phenomena such as distortion. This book can also serve as an excellent reference for researchers in the analog circuit design area and creators of CAD tools, as it provides a comprehensive overview and comparison of various approaches for analog circuit design automation and an extensive bibliography. The world is essentially analog in nature, hence most electronic systems involve both analog and digital circuitry. As the number of transistors that can be integrated on a single integrated circuit (IC) substrate steadily increases over time, an ever increasing number of systems will be implemented with one, or a few, very complex ICs because of their lower production costs.

This book focuses on modeling, simulation and analysis of analog circuit aging. First, all important nanometer CMOS physical effects resulting in circuit unreliability are reviewed. Then, transistor aging compact models for circuit simulation are discussed and several methods for efficient circuit reliability simulation are explained and compared. Ultimately, the impact of transistor aging on analog circuits is studied. Aging-resilient and aging-immune circuits are identified and the impact of technology scaling is discussed. The models and simulation techniques described in the book are intended as an aid for device engineers, circuit designers and the EDA community to understand and to mitigate the impact of aging effects on nanometer CMOS ICs.

This book brings together important contributions and state-of-the-art research results in the rapidly advancing area of symbolic analysis of analog circuits. It is also of interest to those working in analog CAD. The book is an excellent reference, providing insights into some of the most important issues in the symbolic analysis of analog circuits.

It is a great honor to provide a few words of introduction for Dr. Georges Gielen''s and Prof. Willy Sansen''s book "Symbolic analysis for automated design of analog integrated circuits". The symbolic analysis method presented in this book represents a significant step forward in the area of analog circuit design. As demonstrated in this book, symbolic analysis opens up new possibilities for the development of computer-aided design (CAD) tools that can analyze an analog circuit topology and automatically size the components for a given set of specifications. Symbolic analysis even has the potential to improve the training of young analog circuit designers and to guide more experienced designers through second-order phenomena such as distortion. This book can also serve as an excellent reference for researchers in the analog circuit design area and creators of CAD tools, as it provides a comprehensive overview and comparison of various approaches for analog circuit design automation and an extensive bibliography. The world is essentially analog in nature, hence most electronic systems involve both analog and digital circuitry. As the number of transistors that can be integrated on a single integrated circuit (IC) substrate steadily increases over time, an ever increasing number of systems will be implemented with one, or a few, very complex ICs because of their lower production costs.

Systematic Design of Analog IP Blocks introduces a design methodology that can help to bridge the productivity gap. Two different types of designs, depending on the design challenge, have been identified: commodity IP and star IP. Each category requires a different approach to boost design productivity. Commodity IP blocks are well suited to be automated in an analog synthesis environment and provided as soft IP. The design knowledge is usually common knowledge, and reuse is high accounting for the setup time needed for the analog library. Star IP still changes as technology evolves and the design cost can only be reduced by following a systematic design approach supported by point tools to relieve the designer from error-prone, repetitive tasks, allowing him/her to focus on new ideas to push the limits of the design. To validate the presented methodologies, three different industrial-strength applications have been selected and designed accordingly.

Analog integrated circuits are very important as interfaces between the digital parts of integrated electronic systems and the outside world. A large portion of the effort involved in designing these circuits is spent in the layout phase. Whereas the physical design of digital circuits is automated to a large extent, the layout of analog circuits is still a manual, time-consuming and error-prone task. This is mainly due to the continuous nature of analog signals, which causes analog circuit performance to be very sensitive to layout parasitics. The parasitic elements associated with interconnect wires cause loading and coupling effects that degrade the frequency behaviour and the noise performance of analog circuits. Device mismatch and thermal effects put a fundamental limit on the achievable accuracy of circuits. For successful automation of analog layout, advanced place and route tools that can handle these critical parasitics are required. In the past, automatic analog layout tools tried to optimize the layout without quantifying the performance degradation introduced by layout parasitics. Therefore, it was not guaranteed that the resulting layout met the specifications and one or more layout iterations could be needed. In Analog Layout Generation for Performance and Manufacturability, the authors propose a performance driven layout strategy to overcome this problem. In this methodology, the layout tools are driven by performance constraints, such that the final layout, with parasitic effects, still satisfies the specifications of the circuit. The performance degradation associated with an intermediate layout solution is evaluated at runtime using predetermined sensitivities. In contrast with other performance driven layout methodologies, the tools proposed in this book operate directly on the performance constraints, without an intermediate parasitic constraint generation step. This approach makes a completeand sensible trade-off between the different layout alternatives possible at runtime and therefore eliminates the possible feedback route between constraint derivation, placement and layout extraction. Besides its influence on the performance, layout also has a profound impact on the yield and testability of an analog circuit. In Analog Layout Generation for Performance and Manufacturability, the authors outline a new criterion to quantify the detectability of a fault and combine this with a yield model to evaluate the testability of an integrated circuit layout. They then integrate this technique with their performance driven routing algorithm to produce layouts that have optimal manufacturability while still meeting their performance specifications. Analog Layout Generation for Performance and Manufacturability will be of interest to analog engineers, researchers and students.

In the first part the AMGIE analog synthesis system is described. AMGIE is the first analog synthesis system that automates the full design process from specifications down to verified layout. It is targeted to the design of moderate-complexity circuits. It relies on design and circuit knowledge stored in the tool's libraries and can be used by both novice and experienced analog designers as well as system-level designers. The inner workings are explained in detail, with (practical) examples to demonstrate how the implemented algorithms and techniques work. Experimental results obtained with the AMGIE system are reported, including actual fabricated and measured circuits. The second approach, i.e. the systematic design of high-performance analog circuits, is discussed in the second part of the book. This approach is supported by tools to boost the productivity of the designer. An example of such a tool is Mondriaan, that is targeted towards the automatic layout generation of highly regular analog blocks. The proposed systematic design methodology is then applied to the design of high-accuracy current-steering digital to analog converters (DACs). The full design path is discussed in detail. Both complementary approaches increase analog design productivity. Design times of the different design experiments undertaken are reported throughout the book to demonstrate this.

Modern System-on-Chip designs are increasingly mixed-signal designs that require efficient systematic design methodologies and supporting computer-aided design (CAD) tools to manage the design complexity in the available design time, that is ever decreasing due to tightening time-to-market constraints. The purpose of Low-Power Design Techniques and CAD Tools for Analog and RF Integrated Circuits is to provide an overview of very recent research results that have been achieved as part of the Low-Power Initiative of the European Union, in the field of analog, RF and mixed-signal design methodologies and CAD tools. It is a representative sampling of the current state of the art in this area, with special focus on low-power design methodologies and tools for analog and RF circuits and architectures. Concrete designs, mainly for telecommunication applications, such as low-noise amplifiers, oscillators, filters, but also complete transceiver front-ends, are discussed and analyzed in a methodological way, and their modeling and simulation, both at the circuit level and at the architectural level, are treated. In this way, the eleven contributions of this book combine in a unique way designs with methodologies and CAD that will be interesting to designers and CAD developers, both in industry and academia.