Simon Deleonibus – författare

In this book, internationally recognized researchers give a state-of-the-art overview of the electronic device architectures required for the nano-CMOS era and beyond. The book covers the fundamental limits of core CMOS, improving scaling by the introduction of new materials or processes, multigates and multichannels, and quantum computing.

A state-of-the-art overview by internationally recognized researchers, this book reviews the architectures of breakthrough devices required for future intelligent integrated systems. It highlights advanced ailicon-based CMOS technologies. New device and functional architectures are reviewed in chapters on Tunneling Field-Effect Transistors and 3-D monolithic Integration, which the alternative materials could possibly use in the future. It illustrates how to augment silicon technologies by the co-integration of new types of devices, such as molecular and resistive spintronics-based memories and smart sensors, using nanoscale features co-integrated with silicon CMOS or above it.

Since its invention, the integrated circuit has necessitated new process modules and numerous architectural changes to improve application performances, power consumption, and cost reduction. Silicon CMOS is now well established to offer the integration of several tens of billions of devices on a chip or in a system. At present, there are important challenges in the introduction of heterogeneous co-integration of materials and devices with the silicon CMOS 2D- and 3D-based platforms. New fabrication techniques allowing strong energy and variability efficiency come in as possible players to improve the various figures of merit of fabrication technology. Integrated Nanodevice and Nanosystem Fabrication: Breakthroughs and Alternatives is the second volume in the Pan Stanford Series on Intelligent Nanosystems. The book contains 8 chapters and is divided into two parts, the first of which reports breakthrough materials and techniques such as single ion implantation in silicon and diamond, graphene and 2D materials, nanofabrication using scanning probe microscopes, while the second tackles the scaling and architectural aspects of silicon devices through HiK scaling for nanoCMOS, nanoscale epitaxial growth of group IV semiconductors, design for variability co-optimization in SOI FinFETs, and nanowires for CMOS and diversifications.

The history of information and communications technologies (ICT) has been paved by both evolutive paths and challenging alternatives, so-called emerging devices and architectures. Their introduction poses the issues of state variable definition, information processing, and process integration in 2D, above IC, and in 3D. This book reviews the capabilities of integrated nanosystems to match low power and high performance either by hybrid and heterogeneous CMOS in 2D/3D or by emerging devices for alternative sensing, actuating, data storage, and processing. The choice of future ICTs will need to take into account not only their energy efficiency but also their sustainability in the global ecosystem.

The era of Sustainable and Energy Efficient Nanoelectronics and Nanosystems has come. The research and development on Scalable and 3D integrated Diversified functions together with new computing architectures is in full swing. Besides data processing, data storage, new sensing modes and communication capabilities need the revision of process architecture to enable the Heterogeneous co integration of add-on devices with CMOS: the new defined functions and paradigms open the way to Augmented Nanosystems. The choices for future breakthroughs will request the study of new devices, circuits and computing architectures and to take new unexplored paths including as well new materials and integration schmes.This book reviews in two sections, including seven chapters, essential modules to build Diversified Nanosystems based on Nanoelectronics and finally how they pave the way to the definition of Nanofunctions for Augmented Nanosystems.