VLSI Architectures for Future Video Coding

Maurizio Martina is an Associate Professor in the Electronics and Telecommunications Department at Politecnico di Torino, Italy. He conducts research in the field of VLSI architectures for multimedia signal processing and communications, particularly the design of image/video compression and iterative channel-code decoder architectures. He has published almost 100 papers in international journals and conferences. He is and has been in the technical program committee of several international conferences.

• Chapter 1: Scalable transform architectures for video codingChapter 2: Joint algorithm-architecture design of video coding modulesChapter 3: High-throughput architectures for high-resolution video coding: system architecture analysisChapter 4: High-throughput architectures for high-resolution video coding: hardwired oriented algorithms and VLSI architecturesChapter 5: Low-power circuit design techniques for high-resolution video codingChapter 6: Real-time architectures for 3D video codingChapter 7: Frame memory compression for high-resolution video codingChapter 8: Discrete transform approximations for video codingChapter 9: Reconfigurable and approximate computing for video codingChapter 10: Future video coding: new tools and algorithms