Yusuf Leblebici – författare

With a design-centric approach, this textbook bridges the gap between fundamental analog electronic circuit textbooks and more advanced RF IC design texts. The major issues that must be taken into account when combining analog and digital circuit building blocks are covered, together with the key criteria and parameters that are used to describe system-level performance. Simple circuit models enable a robust understanding of high-frequency design fundamentals, and SPICE simulations are used to check results and fine-tune the design. With solved design examples to guide the reader through the decision process that accompanies each design task, this is an ideal textbook for senior undergraduate and graduate courses in RF CMOS circuits, RF circuit design, and high-frequency analog circuit design. Analog integrated circuit designers and RF circuit designers in industry who need help making design choices will also find this a practical and valuable reference.

This volume addresses the issues related to hot-carrier reliability of MOS VLSI circuits, ranging from device physics to circuit design guidelines. It presents a unified view of the physical mechanisms involved in hot-carrier induced device degradation, the prevalent models for these mechanisms, and simulation methods for estimating hot-carrier effects in the circuit environment. The newly emerging approaches to the VLSI design-for-reliability and rule-based reliability diagnosis are also discussed in detail. Hot-Carrier Reliability of MOS VLSI Circuits is primarily for use by engineers and scientists who study device and circuit-level reliability in VLSI systems and develop practical reliability measures and models. VLSI designers will benefit from this book since it offers a comprehensive overview of the interacting mechanisms that influence hot-carrier reliability, and also provides useful guidelines for reliable VLSI design. This volume can be used as an advanced textbook or reference for a graduate-level course on VLSI reliability.

Features contributions on developments and challenges in research and education on microelectronics, microsystems and related areas. This book is intended for professors, researchers and PhDs involved in microelectronics and/or in electrical engineering, microsystems and material sciences.

The intention of this book is to address a number of timely, performance-critical issues within the field of short-distance optical communications, from a circuit designer’s perspective. It discusses the major trade-offs the designer has to deal with in the development of monolithically integrated receivers in CMOS technologies. As such, it is based on Dr. Muller’s doctoral dissertation entitled “A Standard CMOS Multi-Channel Single-Chip Receiver for Multi-Gigabit Optical Data Communications”, subm- ted to the School of Engineering of the École Polytechnique Fédérale de Lausanne (EPFL) in May 2006. The dissertation material has been enhanced by the presentation of a number of alternative design approaches and circuit topologies, providing exhaustive coverage of the state of the art in optical sho- distance receiver circuit design. The need for a new processor input/output (I/O) interface paradigm is dictated by ongoing te- nology scaling and the advent of multi-core systems. Indeed, each new generation of microprocessors and digital signal processors provides higher computing power and data throughput, whereas the available bandwidth of the I/O interfaces is subject to much slower growth. Moving beyond - coming serial links to an optical data link paradigm for very short-distance (board-to-board and chip-- chip communications allows for considerable I/O interface bandwidth enhancement. Fully integrated silicon CMOS receivers are considered to be the technology of choice to lead this solution to economic success, because monolithic integration results in lower volume-manufacturing cost, improved yield and reduced assembly and test expenses.

Nanosystems use new, nanoscopic electrical and/or mechanical devices which, as constituents of electronic and electromechanical systems, find application primarily in computing, embedded control and biomedical data acquisition. In particular, this book will deal with the characterization and patterning of these materials from an engineering perspective, with the objective of creating operational prototypes and products.The book will integrate various nano technologies on materials, devices and systems and identify key areas and results. The book will describe different design aspects for integrated systems on silicon, as well as on heterogeneous platforms including, but not limited to, electrical, optical, micromechanical and biological components in various forms and mixtures. By associating research topics from differing horizons, the book will provide a unique opportunity to bridge the gap between electronics/electrical engineering and materials science. The book will include topics at the intersection of these disciplines, and will interface with computer science, biology and medicine.

This book is intended to give a general overview of reliability, faults, fault models, nanotechnology, nanodevices, fault-tolerant architectures and reliability evaluation techniques. Additionally, the book provides an in depth state-of-the-art research results and methods for fault tolerance as well as the methodology for designing fault-tolerant systems out of highly unreliable components.

Design exibility and power consumption in addition to the cost, have always been the most important issues in design of integrated circuits (ICs), and are the main concerns of this research, as well. Energy Consumptions: Power dissipation (P ) and energy consumption are - diss pecially importantwhen there is a limited amountof power budgetor limited source of energy. Very common examples are portable systems where the battery life time depends on system power consumption. Many different techniques have been - veloped to reduce or manage the circuit power consumption in this type of systems. Ultra-low power (ULP) applications are another examples where power dissipation is the primary design issue. In such applications, the power budget is so restricted that very special circuit and system level design techniquesare needed to satisfy the requirements. Circuits employed in applications such as wireless sensor networks (WSN), wearable battery powered systems [1], and implantable circuits for biol- ical applications need to consume very low amount of power such that the entire system can survive for a very long time without the need for changingor recharging battery[2–4]. Using newpowersupplytechniquessuchas energyharvesting[5]and printable batteries [6], is another reason for reducing power dissipation. Devel- ing special design techniques for implementing low power circuits [7–9], as well as dynamic power management (DPM) schemes [10] are the two main approaches to control the system power consumption. Design Flexibility: Design exibility is the other important issue in modern in- grated systems.

As the complexity and the density of VLSI chips increase with shrinking design rules, the evaluation of long-term reliability of MOS VLSI circuits is becoming an important problem. The assessment and improvement of reliability on the circuit level should be based on both the failure mode analysis and the basic understanding of the physical failure mechanisms observed in integrated circuits. Hot-carrier induced degrada­ tion of MOS transistor characteristics is one of the primary mechanisms affecting the long-term reliability of MOS VLSI circuits. It is likely to become even more important in future generation chips, since the down­ ward scaling of transistor dimensions without proportional scaling of the operating voltage aggravates this problem. A thorough understanding of the physical mechanisms leading to hot-carrier related degradation of MOS transistors is a prerequisite for accurate circuit reliability evaluation. It is also being recognized that important reliability concerns other than the post-manufacture reliability qualification need to be addressed rigorously early in the design phase. The development and use of accurate reliability simulation tools are therefore crucial for early assessment and improvement of circuit reliability : Once the long-term reliability of the circuit is estimated through simulation, the results can be compared with predetermined reliability specifications or limits. If the predicted reliability does not satisfy the requirements, appropriate design modifications may be carried out to improve the resistance of the devices to degradation.

This book is intended to give a general overview of reliability, faults, fault models, nanotechnology, nanodevices, fault-tolerant architectures and reliability evaluation techniques. Additionally, the book provides an in depth state-of-the-art research results and methods for fault tolerance as well as the methodology for designing fault-tolerant systems out of highly unreliable components.

Nanosystems use new, nanoscopic electrical and/or mechanical devices which, as constituents of electronic and electromechanical systems, find application primarily in computing, embedded control and biomedical data acquisition. In particular, this book will deal with the characterization and patterning of these materials from an engineering perspective, with the objective of creating operational prototypes and products.The book will integrate various nano technologies on materials, devices and systems and identify key areas and results. The book will describe different design aspects for integrated systems on silicon, as well as on heterogeneous platforms including, but not limited to, electrical, optical, micromechanical and biological components in various forms and mixtures. By associating research topics from differing horizons, the book will provide a unique opportunity to bridge the gap between electronics/electrical engineering and materials science. The book will include topics at the intersection of these disciplines, and will interface with computer science, biology and medicine.

Design exibility and power consumption in addition to the cost, have always been the most important issues in design of integrated circuits (ICs), and are the main concerns of this research, as well. Energy Consumptions: Power dissipation (P ) and energy consumption are - diss pecially importantwhen there is a limited amountof power budgetor limited source of energy. Very common examples are portable systems where the battery life time depends on system power consumption. Many different techniques have been - veloped to reduce or manage the circuit power consumption in this type of systems. Ultra-low power (ULP) applications are another examples where power dissipation is the primary design issue. In such applications, the power budget is so restricted that very special circuit and system level design techniquesare needed to satisfy the requirements. Circuits employed in applications such as wireless sensor networks (WSN), wearable battery powered systems [1], and implantable circuits for biol- ical applications need to consume very low amount of power such that the entire system can survive for a very long time without the need for changingor recharging battery[2–4]. Using newpowersupplytechniquessuchas energyharvesting[5]and printable batteries [6], is another reason for reducing power dissipation. Devel- ing special design techniques for implementing low power circuits [7–9], as well as dynamic power management (DPM) schemes [10] are the two main approaches to control the system power consumption. Design Flexibility: Design exibility is the other important issue in modern in- grated systems.

This book discusses the implementation of digital circuits by using MCML gates. This book provides a complete automation methodology for the implementation of digital circuits in MCML and provides an extensive explanation on the technical details of design of MCML.

This textbook is ideal for senior undergraduate and graduate courses in RF CMOS circuits, RF circuit design, and high-frequency analog circuit design.

This textbook is ideal for senior undergraduate and graduate courses in RF CMOS circuits, RF circuit design, and high-frequency analog circuit design.

This book discusses the design of multi-camera systems and their application to fields such as the virtual reality, gaming, film industry, medicine, automotive industry, drones, etc.  The authors cover the basics of image formation, algorithms for stitching a panoramic image from multiple cameras, and multiple real-time hardware system architectures, in order to have panoramic videos. Several specific applications of multi-camera systems are presented, such as depth estimation, high dynamic range imaging, and medical imaging.

The authors cover the basics of image formation, algorithms for stitching a panoramic image from multiple cameras, and multiple real-time hardware system architectures, in order to have panoramic videos.

This book discusses the implementation of digital circuits by using MCML gates. Although digital circuit implementation is possible with other elements, such as CMOS gates, MCML implementations can provide superior performance in certain applications. This book provides a complete automation methodology for the implementation of digital circuits in MCML and provides an extensive explanation on the technical details of design of MCML.  A systematic methodology is presented to build efficient MCML standard-cell libraries, and a complete top-down design flow is shown to implement complex systems using such building blocks.

The intention of this book is to address a number of timely, performance-critical issues within the field of short-distance optical communications, from a circuit designer’s perspective. It discusses the major trade-offs the designer has to deal with in the development of monolithically integrated receivers in CMOS technologies. As such, it is based on Dr. Muller’s doctoral dissertation entitled “A Standard CMOS Multi-Channel Single-Chip Receiver for Multi-Gigabit Optical Data Communications”, subm- ted to the School of Engineering of the École Polytechnique Fédérale de Lausanne (EPFL) in May 2006. The dissertation material has been enhanced by the presentation of a number of alternative design approaches and circuit topologies, providing exhaustive coverage of the state of the art in optical sho- distance receiver circuit design. The need for a new processor input/output (I/O) interface paradigm is dictated by ongoing te- nology scaling and the advent of multi-core systems. Indeed, each new generation of microprocessors and digital signal processors provides higher computing power and data throughput, whereas the available bandwidth of the I/O interfaces is subject to much slower growth. Moving beyond - coming serial links to an optical data link paradigm for very short-distance (board-to-board and chip-- chip communications allows for considerable I/O interface bandwidth enhancement. Fully integrated silicon CMOS receivers are considered to be the technology of choice to lead this solution to economic success, because monolithic integration results in lower volume-manufacturing cost, improved yield and reduced assembly and test expenses.